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courses:system_design:vhdl_language_and_syntax:extended_data_types:quiz

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Quiz

signal A_BUS, B_BUS, Z_BUS :        bit_vector (3 downto 0);
signal A_BIT, B_BIT, C_BIT, D_BIT : bit;
signal BYTE :                       bit_vector (7 downto 0);

Array assignment are made...

...according to the position per default.
...according to the index per default.
...at option.

A BIT_VECTOR assignment is e.g., ...

...<= "00111XXUUU00";
...<= "0000111000111"

Which assignment are correct with the above definitions?

BYTE <= (others = > '1');
BYTE(7 downto 4) <= A_BIT & B_BIT & A_BIT & B_BIT;
Z_BUS <= A_BIT & B_BIT;
BYTE(3 downto 0) <= ('1', B_BIT, '0', D_BIT);
A_BUS(0 to 1) <= (others => '0');

Multivalued datatypes ...

... have always a resolution function
... are enumeration types
... can be concatenated to arrays or records

Several signals of a data type ...

... that is not resolved must not drive a signal output signal of that type
... can build an array, but not a record
... can be assigned to (parts of) a bus of the appropriate vector type.

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Chapters of System Design > VHDL Language and Syntax > Extended Data Types

Introduction
Standard Logic Type
Enumeration Types
Arrays
More
Quiz

Chapters of System Design > VHDL Language and Syntax

General Issues
VHDL Structural Elements
Data Types
Process Execution
Extended Data Types
Operators
Sequential Statements
Subprograms
Subprogram Declaration and Overloading
Concurrent Statements

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