courses:system_design:synthesis:master-slave_flip-flop:start

Why MSFF?

Integrated Circuit

integrated circuit = combinational logic + storage elements

  • Binary storage element: stores values 0 or 1
  • MS-FF: complete isolation/de-coupling of inputs and outputs
    • input value is buffered and transfered to the output
    • the inputs are locked
    • two static latches (or gated, transparent)
    • locked/controlled by complementary clock.
  • MS-FF: basic storage element for ASIC/IC/FPGA design
    • applications for MS-FF: state machine (counter, shift registers, controllers) further is:
      • FF : master-slave FF
      • Latch : transparent, bistable multivibrator/flipflop

Example Moore Automaton

output vector is a function of state vector: Y = f(S)

the state vector is coded binary:

subtype STATE is bit_vector (1 downto 0);
constant START    : STATE  := “00” ;
constant MIDDLE   : STATE  := “01” ;
constant STOP     : STATE  :=10;

State Chart

i.A. is: Number of “FF”: ENTIER(log2 states)

#States == 2 #FF

Example:

  • #States: 72
  • log2(72) = ln(72)/ln(2) = 6,1 ⇒ 7 FF
  • 27= 128 !!!!!

Notes

base 2 logarithm

2 power FF (number of ff)

log2(n) = ln(n)/ln(2) = log(n)/log(2)

#States: 72

log2(72) = ln(72)/ln(2) = 6,1 ⇒ 7 FF

27= 128 !!!!! that means :: 56 states that are not allowed, or must be additionally handled!!


Chapters of System Design > Synthesis > Master-Slave Flip-Flop