vhdl-ams:new_data_types:data_types

Data Types

Quantity Overview

Notes

A quantity represents an analog physical discipline (nature). It is used as:

  1. interface of a module at the signal flow simulation
  2. branch quantity and
  3. free quantity.

A free quantity represents an internal analog account, whose physical attribute is allocated in the architecture body. It is declared at the architecture declaration by following syntax:

 {free_quantity_name} := {data type, i. e. real} [:= {initial-value]};
nature across through
electrical voltage current
thermal temperature heat flow rate
mechanical velocity power

across and through

  • across: signal difference between two nodes
  • through: signal flow through the linkage of two nodes

Notes

A branch quantity is subdivided into a potential difference between two nodes (across) and a flow through the linkage of two nodes (through). At the most important application, the simulation of electrical systems, the across quantity is the voltage between two nodes and the through quantity is the current through the linkage of two nodes. A branch quantity is an internal object.

package electrical_system is
   subtype voltage is real;
   subtype current is real;
   nature electrical is
      voltage across
      current through;
                .
                .
                .
end package electrical_system;

nature electrical → at package electrical_system → at library IEEE, Disciplines

architecture arc of entity is
   quantity v1 across ia, ib through k1 to k2;
   quantity v2 across k3 to k4;
      .
      .
      .
begin
   .
   .
   .
end architecture arc;
  • at the architecture declaration part
  • everywhere signals can be

Notes

The branch quantity is declared at the architecture declaration part. It is defined at the respective packages of the library 'IEEE, Disciplines'. The syntax is:

quantity {all across quantities, separated by commas} across
         {all through quantities, separated by commas} through {plus terminal} to {minus terminal};

At least one through quantity or one across quantity must be declared. More than one across quantity between two nodes have got the same value. More than one through quantity represent parallel linkages between two nodes.

entity test is
   port (quantity A, B, C: in real;
             quantity X, Y, Z: out real_vector);
         .
         .
         .
end entity test;

block diagram

  • for a directed signal flow as input- / output signal
  • at the port - list of a entity, otherwise at the architecture
  • node assignment (input, output) and data type
  • new data type: real
  • new vector presentation: real_vector
type real_vector is array(natural range <>) of real;

Notes

A quantity may also be an interface of a module. So the description of a directed signal flow is possible. It is written in the port list of the respective entity with its mode (i. e. in, out). The syntax is:

 port (quantity {all quantities of the same mode}: {mode ,i. e. in, out} {data type});

An interface quantity is an imported / exported object.

entity EXAMPLE is
   port (terminal inp, outp: electrical;
            terminal T: thermal);
          .
          .
          .
end entity EXAMPLE;
 
architecture BHV of EXAMPLE is
    terminal k1, k2, k3: electrical;
         .
         .
         .
begin
         .
         .
         .
end architecture BHV;
  • terminal (one point)
  • has a physical characteristic
  • allocate to its nature
  • as input- / output node at the port - list of an entity, otherwise at the architecture
  • produces a net list

Notes

A terminal represents a single point whose nature must be assigned. As interface node it is declared at the port list of the entity, else at the architecture. Terminals generate a net list of a system. Because of this , a terminal is bidirectional and has no mode(in, out,…).

terminal attributes

T'Reference

  • represents an across quantity
  • voltage between a terminal and a reference node (i. e. ground)
  • from terminal plus to terminal minus

T'Contribution

  • represents a through quantity
  • value is equal to the sum of all through quantities incident to the terminal

Notes

To allocate a nature to a terminal T, the notations T'Reference and T'Contribution are available. The syntax is:

{terminal_name}'Reference
{terminal_name}'Contribution

T'Reference is the across quantity between the terminal T and the reference node. This reference node is at nature electrical ground, but can also be defined by the applicator itself. The terminal represents the plus terminal and the reference node ground. The value of T'Contribution is equal to the sum of the values of all through quantities incident to T (with the appropriate sign).

  • analog signals cross a threshold E
    • are events for the digital part
    • new signal: Q'Above(E)
  • value of Q is above E –> Q'Above(E) = `TRUE'
  • E is not required to be static

analog digital diagram

Notes

For the description of the interface between analog and digital signals the signal Q'Above(E) is available. Its type is boolean. The syntax is:

{quantity_name}'Above({threshold})

When a quantity Q exceeds or falls down a threshold E, it may be the trigger for an event at the digital part. I. e. a process may be sensitive on Q'Above(E). Exceeds Q'Above(E) the threshold, its value is true, else false. The threshold E must be of the same data type like the quantity Q, but it is not required to be static on time.

equation solution flow

  • in general differential equations have no analytic solution
  • tolerance - value determines the quality of the solution
  • any quantity and any equation belongs to a tolerance - group
  • the tolerance - group is definable by the user
  • tolerance is a STRING - expression
quantity cur:real tolerance "current";
X == Y'Dot tolerance "low_voltage";

Notes

In general, differential equations are not solvable analytical. For a simulation on VHDL - AMS several different numerical solution methods are available to reach the solution. Indeed numerical solution methods lead only to approximation results The exactness of the result is determined by specification of a tolerance. The lower it is the exacter is the result. But an exacter result takes more time. Every quantity and every equation belongs to a tolerance group. All members of a tolerance group have got the same tolerance characteristics. A simple simultaneous statement whose LHS (left hand side) is a quantity gets its tolerance group from the quantity, otherwise the tolerance group must be specified. The specification of a tolerance is a string expression. The syntax is:

{quantity or equation} tolerance "{string_expression}";

AC simulation with frequency and noise

frequency simulation

  • spectral source: magnitude + phase
  • predefined word: spectrum

noise simulation

  • support in the frequency domain
  • noise source: magnitude spectrum
  • predefined word: noise
architecture freq of I_source is
   quantity spec: current spectrum mag, phase:
   quantity thns: current noise sqrt(4.0*konst/temp);
   quantity i through p to m;
         .
         .
         .
begin
   i == ampl * sin (2.0*math_pi*frequ*NOW) + spec + thns;
end architecture freq;

Notes

The frequency domain simulation is based the small signal model obtained by linearizing equations about the quiescent point. A spectral source quantity allows to specify stimulus in this domain. The specification of a spectral source is magnitude and phase. It can be frequency dependent, so the predefined function `frequency' can be called in the declaration of source quantities only. The syntax is:

quantity {source_name} : {kind_of_source, i. e. current} spectrum {magnitude}, {phase};

There is also the possibility for noise modeling in the frequency domain. A noise source quantity allows to specify a noise spectrum. The specification of a noise spectrum is magnitude. the syntax is:

quantity {source_name} : {kind_of_noise_source, i. e. current} noise {magnitude};

Chapters of VHDL-AMS > New Data Types