Concurrent Statements
Simultaneous IF and CASE Statement
if {condition} use {simultaneous statement}; [elsif {condition} use {simultaneous statement};] . . . [else {simultaneous statement};] end use;
- appropriation like in VHDL
- useful for piecewise defined signals
if vin < v- use vout == max; elsif vin < v0 use vout == faktor_A * vin; elsif vin < v+ use vout == 0.0; else vout == faktor_B * vin; end use;
case {expression} use when {choices} use {simultaneous statement}; [when {choices} use {simultaneous statement};] . . . end case;
Notes
If and case are used for the same appropriation like in VHDL. But at simultaneous statements the syntax differences a little.
Concurrent Break Statement
break [break_list] [on {sensitivity_clause}] [when {condition}];
sensitivity_clause ⇒ digital signals, the analog part reacts on
if signal = '0' use v == 0.0; else v == vmax; end use; break on signal;
- a concurrent break statement pauses a process
- handling like the sequential break
- new: sensitivity_clause → digital event releases a break → start analog calculations
all simultaneous statements are concurrent; exception: simultaneous procedural statement
Notes
The concurrent break breaks a process. When a digital signal occurs a reaction at the analog part, the process is stopped, the analog changes get handled and then the process goes on. The syntax is:
break [break_list] [sensitivity_clause] [ when {condition}]; sensitivity_clause := on {digital signals, that occur a reaction at the analog part}
For the break_list and the condition see at the sequential break.
Chapters of VHDL-AMS > New Data Types