LAB 1: A Multiplexer

Your first task is to write the VHDL description of a multiplexer. The camera display shall either show the number of pictures that have already been taken or the current exposure time. The following figure shows a schematic of the multiplexer:

TODO Bild The Multiplexer

The multiplexer output shall be equal to its EXP_TIME input when the control signal SHOW_TIME is ’1’. Else, DISP_PHOTO shall be set to NO_PICS.

As EXP_TIME and NO_PICS hold whole-numbered values, integer is the natural data type for the data signals. Bit might be the natural choice for the SHOW_TIME control signal as it holds only two reasonable values. However, you should use std_ulogic instead, as multi-valued logic is especially suited to model actual hardware.

• Create a VHDL model of the multiplexer.
• Use your VHDL compiler to find and eliminate all syntax errors.
• Create a testbench to verify the proper behaviour.
• Compile the testbench.
• Run the simulation. Trace the signal values in a waveform display for verification.
• Synthesize the model using your favourite synthesis tool.

TODO Code DISP_MUX

The waveform display shows that DISP_PHOTO always holds the current value of the selected input port. Changes to this value are transferred to the output immediately whereas modifications to the other port do not affect the output. Thus, the multiplexer behaves as specified. When inspecting the synthesized result, please note that the bus width for the data signals is 32 bit. This is because their data type was specified as integer without any range restrictions. Generally, omitting the range specification will result in a waste of resources. This is one of the reasons for a redesign of the multiplexer as next step.