vhdl_reference_93:visibility_and_validity_ranges

Visibility and validity ranges

Declarative ranges are parts of the description text. Separate, declarative ranges are:

  • Entity-declarations together with their corresponding architecture bodies
  • Configuration declarations
  • Subprogram declarations together with the corresponding subprogram body
  • Package declarations together with the corresponding package body (if present)
  • Record type declarations
  • Component declarations
  • Block statements
  • Process statements
  • Loop statements
  • Block configurations
  • Component configurations
  • Generate statements

A declaration`s validity range goes from the beginning of the declaration to the end of the declarative range in which the declaration is made; this range is called the immediate range.

The validity range of the following declarations extends beyond the corresponding declarative range:

  • Declarations which are made immediately within a package declaration
  • Element declarations within a record type declaration
  • Declarations of formal parameters within subprogram declarations (subprogram specifications if there is no subprogram declaration)
  • Declarations of local generics within component declarations
  • Declarations of local ports within component declarations
  • Declarations of formal generics within entity declarations
  • Declarations of formal ports within entity declarations

In general, the validity range also includes the corresponding configuration, declaration and the configurations and declarations contained therein (hierarchy).

Elements are either made visible by selection or are directly visible. The visibility rules define the range in which a declared object (identifier!) can be accessed. Moreover, only one declaration can be valid for using the object (overloading). A declaration is made visible by selection in the following positions:

  • For a primary unit in a library: in the suffix`s position in a selected name whose prefix qualifies a library.
  • For an architecture which is linked to an entity: in the position of a block specification within the block configuration of an external block whose interface is defined by the current entity.
  • For a declaration within a package declaration: in the suffix`s position in a selected name whose prefix qualifies a package.
  • For an element declaration of a given record declaration: in the suffix`s position in a selected name whose prefix fits for this type; also in the position of a selection in an assignment by names within an aggregate of that type.
  • For a predefined attribute which fits in a definition range: in the designator`s position in an attribute name whose prefix is assigned to a given range.
  • For a user defined attribute: in the designator`s position in an attribute name whose prefix qualifies an entity.
  • For a formal parameter declaration within a given subprogram declaration: in the formal designator`s position in a name-assignment list within the subprogram call.
  • For the local generic declaration of a given component declaration: in the formal designator`s position within a generic name-assignment list belonging to the corresponding component instantiation; also in the current designator`s position within a generic name-assignment list of the corresponding binding indication.
  • For a local port declaration of a given component declaration: in the formal designator`s position within a port name-assignment list of the corresponding component instantiation; also in the current designator`s position in a port name-assignment list of the corresponding binding indication.
  • For a local generic declaration of a given entity declaration: in the formal designator`s position within a generic name-assignment list of the corresponding binding indication.
  • For a formal port declaration of a given entity declaration: in the formal designator`s position in a port name-assignment list of the corresponding binding indication.
  • For a formal generic declaration or a formal port declaration of a given block statement: at the place of the formal designator in a formal part of a named association element of a corresponding generic or port map aspect.

Eventually, every declaration which stands within the declarative range of any given construct (with the exception of RECORD) is made visible as the suffix of an expanded name with the prefix marking the construct mentioned above.

e.g., within a configuration:

    USE ENTITY WORK.tv(SAT1)
    Prefix.Suffix

as 1.

    Rom cell(0) <= ROMBIB.rom_package.constant(0)
    date.month <= "April"
    date <= (Year => 1997, Day => 9, Month => "April") ;
    ASSERT ack`STABLE(setup_time)
    REPORT "setup time violation by Ack"
    SEVERITY WARNING
    ATTRIBUTE author OF tb_i2c : ENTITY IS "Martin Padeffke"
    FUNCTION ksc_fans(Number) RETURN INTEGER ;
    ARCHITECTURE einschaltquoten OF tv IS
    BEGIN
    ...
    pot_viewers <= ksc_fans(football_fans) + ...
    END einschaltquoten ;
    UUT : bus_monitor
    GENERIC MAP ( setup_time => setup, clock_period => clk_period , ... ) ;
    PORT MAP ( bus => scd, takt => scl, ...) ;

as 8. as 9. as 8. respective as 9.

Any given declaration is directly visible within its immediate validity range (except for: hidden declarations): Package declaration can be made directly visible by Use-statements.

A declaration is called hidden if it is overlapped by a local declaration - see the example.

Exception: overloading - several declarations which have the same identifier exist at the same time and the fitting declaration is selected from the context of the call (Overloading resolution).

Signal b is declared in block lbl_1 and in block lbl_2 . If b is addressed without any further designation the `inner` signal is addressed. Otherwise this has to be explicitly designated by placing the corresponding label as a prefix.

lbl_1 : BLOCK
   SIGNAL a, b : bit ;
   BEGIN
 
      lbl_2 : BLOCK
         SIGNAL b : bit ;
         BEGIN
            a <= b AFTER 5 ns ;        -- Equivalent: <- lbl_1.a <= lbl_2.b AFTER 5 ns
            b <= lbl_1.b AFTER 10 ns ; -- Equivalent: <- lbl_2.b <= lbl_1.b AFTER 10 ns
      END BLOCK lbl_2 ;
 
   b <= a AFTER 15 ns ;                -- Equivalent: <- lbl_1.b <= lbl_1.a AFTER 15 ns
END BLOCK lbl_1 ;