vhdl_reference_93:concurrent_assertion

Concurrent assertion

[ label : ] [ postponed ] assertion ;
  • entity_statement_part
  • architecture_statement_part
  • block_statement_part

assert condition
[ report expression ]
[ severity expression ]

For any concurrent assertion statement, there is an equivalent (passive) process statement.

The equivalent process statement of a concurrent assertion statement including the keyword POSTPONED is a postponed process.

If the concurrent assertion contains a static condition then the assertion will be executed only once at the beginning of the simulation.

These are two different examples of assertions.

One condition at a time is checked ( ASSERT ) and if it is not fulfilled a report is given ( REPORT ). The severity level determines which actions are carried out if the condition which is to be checked is not fulfilled.

ASSERT reset = '1' ;
ASSERT reset = '1'
REPORT "Reset ist aktiv !" ;
lbl :
   ASSERT reset = '1'
   REPORT "Reset ist aktiv !"
   SEVERITY warning ;
latch_check :
   ASSERT reset = '1' OR set = '1'
   REPORT "Reset und Set sind" &
          "gleichzeitig aktiv !"
   SEVERITY failure ;
lbl :
   ASSERT data = 0
   REPORT "Datum ist gleich "
         & integer_to_string ( data )
         & " !"
   SEVERITY note ;