vhdl_reference_93:attribute_names

Attribute names

The left element of the first dimension of the one- or multi-dimensional array register is addressed.

register'left(1)

The attribute fanout provides the number of signals driven by output .

output'fanout

The signal clk, delayed by 5ns, is addressed.

clk'delayed( 5 ns )

By using predefined attributes the loop-instruction can be written in a different way as well:

FOR i IN a1'LOW TO a1'HIGH
 
FOR i IN a1'RIGHT TO a1'LEFT
 
FOR i IN a1'REVERSE_RANGE
 
FOR i IN a1'RANGE
SIGNAL a1: bit_vector(3 DOWNTO 0) ;
...
PROCESS (a)
   BEGIN
   z<= "0000" :
   FOR i in 0 TO 3 LOOP
      IF (a = i) THEN
         z(i) <= '1' ;
      END IF ;
   END LOOP ;
END PROCESS ;
...