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vhdl_workshop:lab_9 [2017/02/13 16:14] SSE Minion |
vhdl_workshop:lab_9 [2017/02/15 17:27] SSE Minion [Synopsis] |
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Please have a look at the module interface before you start to design: | Please have a look at the module interface before you start to design: | ||
- | TODO Bild The exposure controller | + | {{: |
==== Behaviour ==== | ==== Behaviour ==== | ||
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==== Data types ==== | ==== Data types ==== | ||
- | The control signals CLK, REST, TIMER_GO and EXPOSE shall be of type **std_ulogic**, | + | The control signals CLK, RESET, TIMER_GO and EXPOSE shall be of type **std_ulogic**, |
==== To do ==== | ==== To do ==== | ||
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end CFG_TB_EXP_CTRL; | end CFG_TB_EXP_CTRL; | ||
</ | </ | ||
+ | |||
+ | ===== Package ===== | ||
+ | {{page> | ||