synthesizeable_vhdl-model-library:patras:universal_multiplier

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synthesizeable_vhdl-model-library:patras:universal_multiplier [2017/03/10 15:35]
SSE Minion created
synthesizeable_vhdl-model-library:patras:universal_multiplier [2017/03/10 15:36]
SSE Minion
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 This component implements an universal multiplier according to the data represenation that is used for the multiplication. More specifically the two variable-length operands , i.e. the N-bit multiplicand and the M-bit multiplier , are multiplied and the N+M-bit result is returned. The produced results depends on a 2-bit "mode" selector which may have four values : "00" means unsigned multiplication, "01" sign magnitude multiplication, "10" 1's complement multiplication and finally "11" means 2's complement multiplication. This component implements an universal multiplier according to the data represenation that is used for the multiplication. More specifically the two variable-length operands , i.e. the N-bit multiplicand and the M-bit multiplier , are multiplied and the N+M-bit result is returned. The produced results depends on a 2-bit "mode" selector which may have four values : "00" means unsigned multiplication, "01" sign magnitude multiplication, "10" 1's complement multiplication and finally "11" means 2's complement multiplication.
  
-====== Model ======+===== Model =====
 <code vhdl universal_multiplier.vhd> <code vhdl universal_multiplier.vhd>
 -- ############################################################################### -- ###############################################################################
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 </code> </code>
  
-====== Testbench ======+===== Testbench =====
 <code vhdl test_universal_multiplier.vhd> <code vhdl test_universal_multiplier.vhd>
 -- ############################################################################### -- ###############################################################################