https://www.vhdl-online.de/ 2026-05-14T19:20:52+00:00 https://www.vhdl-online.de/ https://www.vhdl-online.de/_media/logo.png text/html 2017-03-09T16:36:29+00:00 Anonymous (anonymous@undisclosed.example.com) https://www.vhdl-online.de/synthesizeable_vhdl-model-library/patras/alus?rev=1489077389&do=diff ALUS library The ALUS library consists of the following 4 generic components : * addN: N-bit adder * subN: N-bit subtractor * adsbN: N-bit adder / subtractor * aluNf: N-bit general purpose ALU with flags The ALUS library can be verified with this testbench: text/html 2017-03-10T11:40:47+00:00 Anonymous (anonymous@undisclosed.example.com) https://www.vhdl-online.de/synthesizeable_vhdl-model-library/patras/comparators?rev=1489146047&do=diff COMPARATORS library The COMPARATORS library consists of the following 3 generic components: * eqN: N-bit equality comparator * gleNs: N-bit greater-less-equal signed number magnitude comparator * gleNu: N-bit greater-less-equal unsigned number magnitude comparator text/html 2017-03-10T11:58:47+00:00 Anonymous (anonymous@undisclosed.example.com) https://www.vhdl-online.de/synthesizeable_vhdl-model-library/patras/counters?rev=1489147127&do=diff COUNTERS library The COUNTERS library contains the most common used counters and consists of the following 6 generic components: * buNar: N-bit binary up counter with asynchronous reset * bdNsr: N-bit binary down counter with synchronous reset * budNlr: N-bit binary up-down counter with syncronous load and asynchronous reset text/html 2017-03-10T12:53:29+00:00 Anonymous (anonymous@undisclosed.example.com) https://www.vhdl-online.de/synthesizeable_vhdl-model-library/patras/encoders_decoders?rev=1489150409&do=diff ENCODERS_DECODERS library The ENCODERS_DECODERS library consists of the following 3 generic components: * decN: N input decoder. The input word selects which output bit is asserted. * decNen: N input decoder. The input word selects which output bit is asserted if allowed by enable. This module can be used as a demultiplexer. text/html 2017-03-10T13:04:46+00:00 Anonymous (anonymous@undisclosed.example.com) https://www.vhdl-online.de/synthesizeable_vhdl-model-library/patras/fifos?rev=1489151086&do=diff FIFOs library The FIFOs library consists of the following 2 generic components: * ff_N_W: single clocked fifo with N words of W bits each * dff_N_W: dual clocked fifo with N words of W bits each The FIFOs library can be verified with this testbench: test_fifos ff_N_W text/html 2017-03-10T15:46:59+00:00 Anonymous (anonymous@undisclosed.example.com) https://www.vhdl-online.de/synthesizeable_vhdl-model-library/patras/fir?rev=1489160819&do=diff FIR The FIR consists of the following generic components: * fir_lib: Package for the FIR component * fir: N_taps-Wx x Wc Bits FIR (unrolled) * in_shifter_fir: N_taps-Wx Bit shifter The FIR component can be verified with this testbench: * test_fir (example image for testbench: text/html 2017-03-09T15:28:49+00:00 Anonymous (anonymous@undisclosed.example.com) https://www.vhdl-online.de/synthesizeable_vhdl-model-library/patras/functions?rev=1489073329&do=diff Functions -- ############################################################################ -- # Project : Leonardo CBT-Kernel # -- # # -- # Filename : functions.vhd # -- # # -- # Library : useful_functions # -- # … text/html 2017-03-10T13:16:06+00:00 Anonymous (anonymous@undisclosed.example.com) https://www.vhdl-online.de/synthesizeable_vhdl-model-library/patras/incrementers_decrementers?rev=1489151766&do=diff INCREMENTERs_DECREMENTERs library The INCREMENTERS/DECREMENTERS library consists of the following 3 generic components: * decrN: N-bit decrementer * incN: N-bit incrementer * incdecN: N-bit incrementer/decrementer The INCREMENTERS/DECREMENTERS library can be verified with this testbench: text/html 2017-03-10T13:23:30+00:00 Anonymous (anonymous@undisclosed.example.com) https://www.vhdl-online.de/synthesizeable_vhdl-model-library/patras/muxers?rev=1489152210&do=diff MUXERs library The MUXERs library consists of the following 1 generic component: * mux_N_W: N-input multiplexer, with W-bits for each input The MUXERs library can be verified with this testbench: test_muxers mux_N_W -- ############################################################################ -- # Project : Leonardo CBT-Kernel # -- # # -- # Filename : muxers.vhd … text/html 2017-03-10T13:30:26+00:00 Anonymous (anonymous@undisclosed.example.com) https://www.vhdl-online.de/synthesizeable_vhdl-model-library/patras/registers?rev=1489152626&do=diff REGISTERs library The REGISTERs library consists of the following 1 generic component: * reg_P_X_Y: N-read port register file with X words of Y bits each The REGISTERs library can be verified with this testbench: test_registers reg_P_X_Y -- ############################################################################ -- # Project : Leonardo CBT-Kernel # -- # # -- # Filename … text/html 2017-03-10T14:08:09+00:00 Anonymous (anonymous@undisclosed.example.com) https://www.vhdl-online.de/synthesizeable_vhdl-model-library/patras/shifters?rev=1489154889&do=diff SHIFTERs library The SHIFTERs library consists of the following 4 generic components: * siso: N-bit serial-in / serial-out register * piso: N-bit serial & parallel-in / serial-out register * sispo: N-bit serial-in / serial & parallel-out register * spispo: N-bit serial & parallel-in / serial & parallel-out register text/html 2017-03-10T14:25:05+00:00 Anonymous (anonymous@undisclosed.example.com) https://www.vhdl-online.de/synthesizeable_vhdl-model-library/patras/special?rev=1489155905&do=diff SPECIAL COMPONENTS library The SPECIAL COMPONENTS library consists of the following 6 generic components: * bcd_ss: BCD to Seven-Segment encoder * hex_ss: HEX to Seven-Segment encoder * nrz_hdb3: NRZ to HDB3 encoder (NRZ : Non-Return to Zero, HDB3 : High Density Bipolar 3) text/html 2017-03-10T14:36:22+00:00 Anonymous (anonymous@undisclosed.example.com) https://www.vhdl-online.de/synthesizeable_vhdl-model-library/patras/universal_multiplier?rev=1489156582&do=diff UNIVERSAL MULTIPLIER The UNIVERSAL MULTIPLIER consists of the following generic component: * universal_multiplier The UNIVERSAL MULTIPLIER can be verified with this testbench: * test_universal_multiplier This component implements an universal multiplier according to the data represenation that is used for the multiplication. More specifically the two variable-length operands , i.e. the N-bit multiplicand and the M-bit multiplier , are multiplied and the N+M-bit result is returned. The p…