library ieee; use std.textio.all; use ieee.std_logic_1164.all; use work.P_DISPLAY.all; entity TB_DISP_CTRL is end TB_DISP_CTRL; architecture TEST of TB_DISP_CTRL is component DISP_CTRL port(CLK : in std_ulogic; RESET : in std_ulogic; SWITCH : in std_ulogic; KEY : in T_DIGITS; SHOW_TIME : out std_ulogic); end component; signal W_CLK : std_ulogic := '0'; signal W_RESET : std_ulogic; signal W_SWITCH : std_ulogic; signal W_KEY : T_DIGITS; signal W_SHOW_TIME : std_ulogic; begin DUT : DISP_CTRL port map( CLK => W_CLK, RESET => W_RESET, SWITCH => W_SWITCH, KEY => W_KEY, SHOW_TIME => W_SHOW_TIME); W_CLK <= not W_CLK after 10 ns; STIMULI : process begin W_KEY <= (0,0,0); W_SWITCH <= '0'; W_RESET <= '1'; -- SHOW_TIME = '0' wait for 5 ns; W_KEY <= (1,0,0); -- no changes wait for 20 ns; W_SWITCH <= '1'; -- no changes wait for 20 ns; W_SWITCH <= '0'; -- no changes wait for 20 ns; W_RESET <= '0'; -- SHOW_TIME = '1' wait for 60 ns; W_SWITCH <= '1'; -- no changes wait for 20 ns; W_SWITCH <= '0'; -- no changes wait for 20 ns; W_KEY <= (0,0,0); -- no changes wait for 20 ns; W_SWITCH <= '1'; -- SHOW_TIME = '0' wait for 60 ns; W_SWITCH <= '0'; -- no changes wait for 20 ns; W_SWITCH <= '1'; -- SHOW_TIME = '1' wait for 20 ns; W_SWITCH <= '0'; -- no changes wait for 20 ns; assert false report "End of stimuli reached" severity failure; end process STIMULI; SAMPLE : process(W_SHOW_TIME) constant SPACE : string := " "; variable FILE_LINE : line; FILE OUT_FILE : text IS OUT "lab_7.trace"; begin write(FILE_LINE, to_bit(W_SHOW_TIME)); writeline(OUT_FILE, FILE_LINE); end process SAMPLE; end TEST; configuration CFG_TB_DISP_CTRL of TB_DISP_CTRL is for TEST end for; end CFG_TB_DISP_CTRL;