-- ############################################################################
-- # Project    :    Leonardo CBT-Kernel                                      #
-- #                                                                          #
-- # Filename   :    counters.vhd                                             #
-- #                                                                          #
-- # Component  :    guNar : N-bit gray up counter                            #
-- #                         with asynchronous reset                          #
-- #                                                                          #
-- # Model      :    rtl                                                      #
-- #                                                                          #
-- # Designer   :    S. Theoharis,N. Zervas                                   #
-- # Institute  :    VLSI Design Lab., University of Patras                   #
-- # Date       :    01.05.1999                                               #
-- ############################################################################

library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_arith.ALL;
use work.useful_functions.ALL;

-- guNar Entity Description
entity guNar is
   generic(N: INTEGER := 4);
   port(
      DOUT: out unsigned(N-1 downto 0);
      CLK,R,UP: in std_ulogic;
      COUT: out std_ulogic
   );
end guNar;

-- guNar Architecture Description
architecture rtl of guNar is
   signal istate : unsigned(N-1 downto 0);
   signal count : unsigned(N downto 0);
   signal binary_out : unsigned(N downto 0);
begin
   count <= ('0' & istate) + "01";
 
   Count_Process: process(CLK,R)
   begin
      if (R = '1') then
         -- reset event
         istate <= (OTHERS => '0');
      elsif (CLK'event and (CLK = '1') and (CLK'last_value = '0')) then
         if (UP = '1') then
            -- clocked count up event
            istate <= count(N-1 downto 0);
         end if;
      end if;
   end process Count_Process;
 
   -- Convert input to binary representation
   Bin2Grey(istate,binary_out);
    
   -- Assign output values
   DOUT <= binary_out(N-1 downto 0);
   COUT <= count(N) and UP;
end rtl;